| PART |
Description |
Maker |
| EP8076-3 EP8076-10 EP8076-6 EP8076-9 EP8076-5 EP80 |
CPU Supervisor with 4k SPI EEPROM; Temperature Range: 0°C to 70°C; Package: 8-MSOP
Programmable Delay Line
16 Pin DIP 3 Bit Programmable TTL Delay Lines
|
PCA ELECTRONICS INC.
|
| PDU108H-5MC3 PDU108H PDU108H-.5 PDU108H-.5C3 PDU10 |
3-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE (SERIES PDU108H)
Delay Line 延迟
DELAY LINE|PROGRAMMABLE|1-LINE|1-TAP|HYBRID|DIP|16PIN|PLASTIC 延迟线|可编程| 1线| 1 -技术咨询|混合|双酯| 16PIN |塑料
|
Data Delay Devices, Inc...
DATADELAY[Data Delay Devices, Inc.]
Micrel Semiconductor, Inc.
Electronic Theatre Controls, Inc.
|
| PDU53SERIES PDU53-1000 PDU53-100MC3 PDU53-1000C3 P |
Delay 1200 /-200 ns, 3-BIT, ECL-interfaced programmable delay line
Delay 100 /-50 ns, 3-BIT, ECL-interfaced programmable delay line
Delay 1000 /-200 ns, 3-BIT, ECL-interfaced programmable delay line
3-BIT. ECL-INTERFACED PROGRAMMABLE DELAY LINE
|
Data Delay Devices Inc
|
| PLL102-109XI PLL102-109XC PLL102-109XM PLL102-109 |
Programmable DDR Zero Delay Clock Driver
|
PLL[PhaseLink Corporation]
|
| PDU108H-2M PDU108H-3M PDU108H-5M PDU108H-2C3 PDU10 |
Delay 0.5 /-0.3 ns, 3-BIT, ECL-interfaced programmable delay line
ACTIVE DELAY LINE, TRUE OUTPUT, PDSO16 SMD-16
ACTIVE DELAY LINE, TRUE OUTPUT, PDIP9 DIP-16/9
|
Data Delay Devices Inc
Data Delay Devices, Inc.
|
| MC10E196 MC10E196FN MC100E196 MC100E196FN ON0641 |
From old datasheet system
PROGRAMMABLE DELAYCHIP
PROGRAMMABLE DELAY CHIP
|
ONSEMI[ON Semiconductor]
Motorola, Inc
|
| 3D7424D-4 3D7424-40 3D7424-400 D7424-10 |
MONOLITHIC QUAD 4-BIT PROGRAMMABLE DELAY LINE ACTIVE DELAY LINE, TRUE OUTPUT, PDSO14
MONOLITHIC QUAD 4-BIT PROGRAMMABLE DELAY LINE ACTIVE DELAY LINE, TRUE OUTPUT, PDIP14
|
Data Delay Devices, Inc.
DATA DELAY DEVICES INC
|
| ICS93725 ICS93725YFT |
DDR and SDRAM Zero Delay Buffer
|
ICST[Integrated Circuit Systems]
|
| 1503 1503J 1503-100A 1503-100B 1503-100C 1503-120B |
Max delay 35 ns, Mechanically variable delay line
Max delay 250 ns, Mechanically variable delay line
Max delay 150 ns, Mechanically variable delay line
Max delay 130 ns, Mechanically variable delay line
Max delay 80 ns, Mechanically variable delay line
Max delay 60 ns, Mechanically variable delay line
Max delay 50 ns, Mechanically variable delay line
Max delay 40 ns, Mechanically variable delay line
Max delay 30 ns, Mechanically variable delay line
Max delay 25 ns, Mechanically variable delay line
Max delay 20 ns, Mechanically variable delay line
Max delay 200 ns, Mechanically variable delay line
Max delay 160 ns, Mechanically variable delay line
Max delay 15 ns, Mechanically variable delay line
Max delay 140 ns, Mechanically variable delay line
Max delay 120 ns, Mechanically variable delay line
Max delay 100 ns, Mechanically variable delay line
Mechanically variable passive delay line
|
Data Delay Devices Inc
|
| UPD424263LLE-A80 UPD424263LLE-A70 UPD424263LG5M-A6 |
20-output, 200-MHz Zero Delay Buffer
16 Kbit (2K x 8) nvSRAM
3.3V Zero Delay Buffer
x16 Fast Page Mode DRAM
Three-PLL General-Purpose EPROM Programmable Clock Generator
Phase-Aligned Clock Multiplier x16快速页面模式的DRAM
|
Cooper Hand Tools
|
| NCP51200 |
3 Amp Source / Sink VTT Termination Regulator for DDR, DDR-2, DDR-3, DDR-4
|
ON Semiconductor
|
| ICS93722 ICS93722YFLFT |
Low Cost DDR Phase Lock Loop Zero Delay Buffer
|
ICST[Integrated Circuit Systems]
|
